Projects

Project

eBike Controller

Verilog, SystemVerilog, Digital Design, FPGA

  • Designed and implemented a complete digital controller for a brushless DC motor eBike system using SystemVerilog.
  • Built a comprehensive testbench covering SPI interfaces, cadence simulation, torque seeding, and low-battery thresholds.

Project

RISC-V Pipelined Processor

Verilog, Computer Architecture

  • Designed a 5-stage 32-bit RISC-V processor with hazard detection, data forwarding, branch handling, and stall or flush control.
  • Implemented an instruction decoder supporting the major RV32I instruction formats.
  • Developed pipeline control logic for data and control hazards.

Project

GPU-Accelerated NLOS Image Reconstruction

Python, CuPy, CUDA, SLURM, NumPy

  • Accelerated a non-line-of-sight image reconstruction pipeline by porting FFT and convolution-heavy work from NumPy to CuPy.
  • Used SLURM batch workflows to run the GPU-based pipeline on an HPC cluster.

Project

Press Your Luck Embedded Game

C, freeRTOS, ARM Cortex-M, I2C, UART

  • Built firmware and device drivers for an ARM Cortex-M system with joystick, buttons, and LCD peripherals.
  • Used freeRTOS task scheduling to coordinate game logic, display updates, and input handling.

Project

StayWellNYC

Node.js, Express.js, MySQL, HTML/CSS

  • Built a full-stack web application for exploring NYC properties backed by a MySQL database.
  • Implemented backend routes for listing filters, host views, renter history, and review submission workflows.

Project

FUSE Filesystem

C, UNIX, Filesystems, RAID

  • Implemented a userspace filesystem with FUSE supporting RAID 0 striping and RAID 1 mirroring.
  • Built core file and directory operations that reinforced low-level systems and storage concepts.